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PCB Stackup Explained: Manufacturing Boundaries Every Designer Must Know

Zachariah Peterson
PCB design engineer
September 1, 2026
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Your PCB stackup, both literally and figuratively, is the foundation for your new product. Although the PCB stackup enables everything in your layout, it imposes important constraints on routing and manufacturing. It is up to designers to understand these constraints before sending a PCB out for quoting and fabrication.

By ignoring some basic manufacturability constraints, it can be much more difficult to find a fabrication house that has the capabilities to produce your PCB. In some extreme cases, I have seen well-intentioned designers create circuit board layouts that could never be manufactured. Avoid these problems by following these guidelines for understanding the strengths and boundaries imposed by your PCB stackup.

Your PCB Stackup Enables and Limits Design Freedom

In general, as component count and net count in a PCB increase, the number of layers in the PCB stackup starts to increase. Eventually, the overall thickness also starts to increase, and depending on the capabilities of the components involved, more advanced dielectrics might be used to support high-speed interfaces or RF interconnects. Layer thicknesses also generally decrease in order to prevent a PCB stackup from becoming excessively thick. It is this combination of factors that creates multiple constraints and boundaries on the PCB design.

First, we can see where different types of designs are influenced by layer thickness, dispersion in the dielectric, and total thickness of the board.

High-speed digital designs: Demand thinner dielectrics so traces can route into modern ICs.
High-density designs: Thin films may be required for microvia fabrication and BGA fanout.
RF designs: Typical dielectrics used are PTFE materials above Wi-Fi frequencies, and a range of thicknesses are permissible.
High layer count designs: Thin films for HDI designs could be combined with thicker standard FR-4 materials.
Flex and rigid-flex designs: Placement of routing features, bending, and non-standard thicknesses are common.
Sublamination and backdrilled designs: These always have stricter clearance requirements than standard through-hole builds.
Metal-backed or metal-core designs: Prepreg material and drilling accommodations are needed for the metal layer.
Heavy copper designs: Manufacturability and fabrication capabilities change when heavier copper is used.

Of course, material selection is an important part of designing the PCB stackups for these types of designs. But the materials do not tell the whole story. The design can only be made manufacturable when the routing constraints created by the stackup are enforced.

The Most Common Constraints From a PCB Stackup

Some of the routing constraints imposed by a PCB stackup are basic and apply to all types of designs. This is simply because they are based on the geometry of the entire stackup and the individual layers. In particular, we have the following constraints on all routing layers, drill pairs, and through-holes.

Feature	Manufacturing Limit	Depends On	Main Risk
Through-hole vias	Aspect ratio	Total board thickness and finished drill diameter	Small drills in thick boards
Blind / buried vias	Aspect ratio	Via span depth and drill diameter	Deep spans may require additional sublamination steps
Copper feature size / clearance	Minimum trace width and spacing	Finished copper weight	Heavier copper requires larger features and clearances

Fabrication Risk — Small Through-Hole Vias

I continue to be surprised by the number of designers placing 0.15 mm through-hole vias in stackups with 2 mm total thickness, and this is done without checking the fabricator’s capabilities. Even in standard-thickness boards at 1.57 mm, a 0.15 mm drill diameter may be beyond the capabilities of most fabrication houses. This becomes quite important in designs with large BGAs, fine-pitch QFN packages, and dense PCB layouts in general.

Base Copper vs. Finished Copper

As was mentioned above, clearances and feature sizes are limited by copper weight. When copper weight gets higher, the required clearance and minimum feature size also increase. This is why, when writing fabrication notes or a master drawing, we normally specify the finished copper weight on each of the layers. The most common selection is 1/2 oz on internal layers and 1 oz copper on external layers.

This requires the designer to set different clearance constraints on inner and outer layers based on fabrication capability. For example, in WellerPCB’s process, a 1 oz outer layer copper weight and 1/2 oz inner layer copper weight would give the following trace width and trace spacing limits:

Copper Weight	Minimum Trace Width	Minimum Trace Spacing
0.5 oz	4.0 mil (0.10 mm)	3.5 mil (0.089 mm)
1.0 oz	6.0 mil (0.15 mm)	5.5 mil (0.14 mm)

However, this is not the only common stackup configuration where copper weights vary across different layers. Another common configuration is to use 1 oz base copper thickness on all layers. After plating is performed on the outer layers to fabricate through-hole vias, the outer layer copper weight could have up to 1 mil of thickness added to it, depending on the copper thickness in through-hole via walls. This produces the stackup shown in the image below.

A simple look at your fabrication company’s capabilities can help you determine the right constraints and whether you need to use lighter copper for higher-density components and routing.

Heavy Copper or More Layers?

The discussion in the previous section regarding clearances and copper feature sizes as a function of copper weight now brings up issues with heavy copper. Heavy copper PCBs typically start with 2 oz plating on certain layers, and this could be plated up to even higher values. This brings up a host of issues that need to be discussed with the fabricator prior to finalizing a PCB stackup:

Before Choosing Heavy Copper

Assembly and solderability on heavy copper layers
Allowed drill sizes and required clearances
Minimum trace width and copper-to-copper spacing
Prepreg resin volume and fill around heavy copper features
Copper balance for bow, twist, and dimensional stability
Etch compensation and conductor-width tolerances
Solder mask coverage and dam requirements over large copper steps

Although heavy copper is sometimes recommended when you see many power electronics designs, today’s power electronics are often so complex that heavy copper interferes with routing density, placement density, and solderability of these designs. A much better solution is to simply add more layers at a lower copper weight, ideally at 1 oz. This way, assembly capability on the outer layers will be unaffected by the presence of more copper, and the high-current rails can simply be doubled up between layers.

When More Layers Make More Sense

In complex power designs, heavy copper can reduce routing density, component placement flexibility, and solderability. Adding more layers at a lower copper weight—ideally around 1 oz—can preserve outer-layer assembly capability while distributing high-current rails across multiple layers.

Sequential Laminations Versus Sublamination

Sequential lamination and sublamination builds create routing options unavailable in a conventional through-hole stackup, but every via span has to correspond to a manufacturable drilling, plating, and lamination sequence. The stackup therefore has to be defined before the via architecture is finalized. A designer cannot assign arbitrary blind and buried drill pairs after routing and expect the fabricator to build them.

With a sublamination build, mechanically drilled buried vias are fabricated while the layers at the beginning and end of the via span are exposed surfaces of a smaller multilayer section. That sublamination is then bonded to the rest of the board using prepreg. A buried via span therefore has to remain inside a sublamination that can be drilled and plated before the next bonding operation. Multiple unrelated buried via spans can force additional sublaminations, bonding interfaces, or a different stackup architecture.

This processing also affects copper thickness. The copper layers at the beginning and end of a mechanically drilled buried via span receive plating while the via barrel is formed. Those layers can finish thicker than adjacent copper layers that were not exposed during that plating operation. The resulting copper weight must be accounted for when setting trace width, spacing, impedance, and etch constraints.

For sublamination structures, check the following before layout:

Check Before Layout

Every mechanically drilled blind or buried via span against its sublamination thickness and allowable aspect ratio.
Which prepreg layers bond separately processed sublaminations together.
Which copper layers receive additional plating at the start and end of each buried via span.
The number of drill, plate, and lamination operations required by the complete via architecture.

Sequential lamination adds another set of constraints when laser-drilled microvias are used. Microvia depth is controlled by dielectric thickness between the start and stop layers, so outer buildup films generally have to remain thin enough to stay within the fabricator’s laser microvia aspect-ratio limit. Each additional microvia depth can also require another lamination cycle. Fabricators may limit stacked microvia height, require filled vias for stacking, or prefer staggered structures where process capability becomes a concern.

Standard HDI stackups often combine both approaches. A mechanically drilled buried via may be fabricated in a central sublamination, followed by one or more sequential buildup cycles for laser-drilled microvias near the outer layers. These processes provide substantial routing density, but they do not provide unlimited routing freedom. More drill pairs, plating steps, and lamination cycles directly increase fabrication complexity and cost.

Even if you understand PCB stackup design and material selection, you should consult your circuit board fabricator firstly to ensure they can approve your stackup design. They may be able to offer a better option based on their material availability and manufacturing capabilities.

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