In the intricate world of high-speed and high-frequency PCB design, success or failure is often determined long before the first component is placed. It’s decided in the foundational blueprint of the board: the PCB stack-up. While designers meticulously select core materials for their known properties, a critical and often misunderstood variable lies in the glue that holds it all together—the prepreg
A common and costly mistake is to assume that the prepreg, the pre-impregnated bonding material between core layers, simply adopts the Dielectric Constant of the adjacent core. This assumption can lead to a significant miscalculation in your controlled impedance, resulting in degraded signal integrity, timing errors, and ultimately, a non-functional board. So, the pivotal question isn’t if the prepreg’s Dk matters, but how to strategically choose and account for it.
This ultimate guide will demystify the process of selecting the right prepreg Dk value for your PCB stack-up. We will move beyond the datasheet basics to explore the practical realities of the lamination process, empowering you to design with confidence for first-time-right success.
Why the "Datasheet Dk" is Only the Starting Point
The Dielectric Constant is a measure of a material’s ability to store electrical energy in an electric field. A lower Dk value typically translates to faster signal propagation and is generally desirable for high-speed applications. When you look at a material datasheet from a vendor like Isola, Shengyi, or Rogers, you will find a nominal Dk value for their prepregs.
However, this value is measured under ideal, laboratory-controlled conditions. In the real world, the effective Dk of the prepreg in your finished board is a dynamic variable, influenced by three key factors:
Resin Content (%):
Prepregs come with different resin content levels (e.g., 106, 1080, 2116, 7628). A higher resin content (e.g., 106) generally leads to a lower Dk, while a higher glasscloth content (e.g., 7628) results in a slightly higher Dk. Your choice of prepreg style directly impacts the initial Dk value.
The Lamination Process:
During lamination, heat and pressure cause the prepreg's resin to flow and cure. The amount of resin that flows out and the final thickness of the prepreg layer will alter the effective Dk.
Curing against a Copper Plane:
Perhaps the most significant factor is the "Cured Against" surface. When prepreg cures against a copper plane, the glass weave structure is flattened and compressed more than when it cures against another core. This changes the glass-to-resin ratio in that specific area, thereby affecting the local Dk.
A Practical Framework for Choosing Your Prepreg Dk
Choosing the correct value is not about finding one “perfect” number, but about modeling the real-world scenario as accurately as possible. Here is a systematic approach:
Step 1: Consult Your Fabricator Immediately.
This is the most crucial step. Your PCB manufacturer has the exact materials and uses specific lamination profiles. They can provide you with the most accurate effective Dk values for different stack-up scenarios based on their historical data and simulation models. Partnering with them early is non-negotiable.
Step 2: Use Weighted Averages for Initial Calculations.
In the absence of specific data from your fab house, you can model the dielectric layer as a combination of the prepreg and the core. Sophisticated impedance calculators allow you to input separate Dk values for different layers. A common method is to calculate a weighted average based on the thickness of the prepreg and core materials.
Step 3: Understand the Impact of Weave Style.
For very high-speed digital designs (e.g., PCIe, DDR) or RF/microwave circuits, the glass weave pattern itself can cause localized variations in Dk, leading to "glass weave effect" skew. For these sensitive applications, selecting a spread-glass or flat-glass prepreg style is often essential to minimize this effect, and your Dk choice must account for this more consistent material structure.
When you start to a new PCB design, it is worth to have a global consideration on stack-up construction once it comes to a multi-layer circuit board with high performance, durable reliability expected. Below is the prepreg Shengyi S1000H/S1000HB selection reference once your PCB will operate in high frequency, high speed or impedance control required. Contact us freely if you need more assistance in design a complexity stack-up.
Based Material Line Up S1000H (S1000HB)-PREPREG (B-STAGE)
| Glass style | RC (%) Nominal | Thickness | Dk | Df | |||||||
| mm | mil | 1GHz | 3GHz | 5GHz | 10GHz | 1 GHz | 3 GHz | 5 GHz | 10 GHz | ||
| 7628 | 43* | 0.185 | 7.28 | 4.81 | 4.74 | 4.74 | 4.73 | 0.014 | 0.015 | 0.015 | 0.016 |
| 7628 | 46 | 0.195 | 7.68 | 4.74 | 4.68 | 4.66 | 4.66 | 0.015 | 0.016 | 0.016 | 0.016 |
| 7628 | 48 | 0.205 | 8.07 | 4.70 | 4.63 | 4.61 | 4.61 | 0.015 | 0.016 | 0.016 | 0.017 |
| 7628 | 50 | 0.215 | 8.46 | 4.65 | 4.58 | 4.57 | 4.57 | 0.016 | 0.016 | 0.017 | 0.017 |
| 7628 | 52 | 0.225 | 8.86 | 4.59 | 4.52 | 4.51 | 4.50 | 0.016 | 0.016 | 0.017 | 0.017 |
| 1506 | 48 | 0.160 | 6.30 | 4.70 | 4.63 | 4.61 | 4.61 | 0.015 | 0.016 | 0.016 | 0.017 |
| 1506 | 50 | 0.170 | 6.69 | 4.65 | 4.58 | 4.57 | 4.57 | 0.016 | 0.016 | 0.017 | 0.017 |
| 1506 | 52 | 0.180 | 7.09 | 4.59 | 4.52 | 4.51 | 4.50 | 0.016 | 0.016 | 0.017 | 0.017 |
| 2116 | 52* | 0.113 | 4.45 | 4.59 | 4.52 | 4.51 | 4.50 | 0.016 | 0.016 | 0.017 | 0.017 |
| 2116 | 53* | 0.116 | 4.57 | 4.57 | 4.50 | 4.49 | 4.48 | 0.016 | 0.017 | 0.017 | 0.018 |
| 2116 | 55 | 0.120 | 4.72 | 4.53 | 4.45 | 4.43 | 4.43 | 0.017 | 0.017 | 0.018 | 0.018 |
| 2116 | 58 | 0.130 | 5.12 | 4.45 | 4.38 | 4.36 | 4.36 | 0.017 | 0.018 | 0.018 | 0.018 |
| 3313 | 57 | 0.100 | 3.94 | 4.48 | 4.41 | 4.39 | 4.39 | 0.017 | 0.018 | 0.018 | 0.018 |
| 1080 | 65 | 0.072 | 2.83 | 4.29 | 4.21 | 4.19 | 4.18 | 0.019 | 0.019 | 0.019 | 0.020 |
| 1080 | 68 | 0.081 | 3.19 | 4.21 | 4.13 | 4.11 | 4.11 | 0.020 | 0.019 | 0.020 | 0.020 |
| 1080 | 70 | 0.087 | 3.43 | 4.16 | 4.08 | 4.05 | 4.05 | 0.020 | 0.019 | 0.020 | 0.020 |
| 106 | 73 | 0.050 | 1.97 | 4.09 | 4.01 | 3.97 | 3.97 | 0.020 | 0.020 | 0.020 | 0.020 |
| 106 | 78 | 0.063 | 2.14 | 3.97 | 3.89 | 3.83 | 3.83 | 0.02 | 0.021 | 0.020 | 0.022 |
| Remark: | |||||||||||
| 1) Test by SPDR method. | |||||||||||
| 2) The data above show actual values and are not guaranteed, for your reference only. | |||||||||||
| 3) RC* is not common type for reference. | |||||||||||
| 4) Last update: Oct, 2025 | |||||||||||
By understanding that the prepreg’s Dk is a fluid property and adopting this systematic, collaborative approach, you transform a potential point of failure into a controlled variable. In the following sections, we will dive deeper into each of these steps, complete with examples and calculations, to ensure your next PCB stack-up is designed for optimal performance and manufacturability.
